Bond pads are used to connect packaged integrated circuits on a semiconductor chip with external circuitry on a printed circuit board or lead frame. The connections with the external circuitry supply power and communicate signals to the active circuitry of an integrated circuit. For integrated circuits that operate high frequencies, such as integrated circuits constructed for radiofrequency (RF) applications, a ground plane is required to reduce the coupling of noise from the active circuitry on the chip to the bond pad. A typical ground plane comprises a layer of doped polysilicon or metal strips arranged between the bond pad and the active circuitry and is wired at a direct current circuit node/potential different from the bond pad itself.
Active circuitry is typically not positioned within the chip area beneath the bond pad and ground plane. Consequently, the use of ground planes for bond pads may waste large areas of the chip that could otherwise be utilized for active circuitry. Fabrication techniques have been developed that allow bond pads to be disposed within the perimeter of the active circuit area so that the bond pad overlies active circuitry. However, a circuit designer is forced to model the bond pad to reflect multiple different variations and permutations for active and passive devices in the chip area beneath the bond pad.
High-frequency and, in particular, radiofrequency integrated circuits include a large number of switches capable of rapidly changing state. The high switching rates may induce transient current surges in the ground and supply lines, which cause variations in the supply voltage. To minimize these variations and maintain proper circuit operation, decoupling capacitors are used to filter the noise that may be present in the ground and supply lines. Decoupling capacitors are connected between the supply voltage and ground in parallel with the supplied integrated circuit. The parallel capacitance decouples the supply voltage from disturbances induced by high speed switching, which allows the supply voltage to remain at the intended level.
To optimize their effectiveness, circuit designers generally attempt to place decoupling capacitors as close as practical to the load represented by the active circuitry on the chip. Consequently, the most effective solution for noise filtering is to fabricate decoupling capacitors directly on the chip itself. Unfortunately, on-chip decoupling capacitors may utilize as much as thirty percent of the active circuit area on the chip, which significantly reduces the profit margin for monolithic integrated circuits.
Consequently, design structures are needed that incorporate a shielding structure of electrically characterized devices for shielding the bond pad from noise generated by active circuitry underlying the bond pad.